The success and ongoing trend of on-chip optic integration anticipate a photonic road-map leading to compact photonic integrated components and circuits [1]. An on-chip polarization splitter that is important to achieve polarization independent operation has been proposed with various approaches. These approaches overcome the drawbacks of large device footprint for the adiabatic mode evolution [2], the disadvantage of clamped bandwidths, and the tighter fabrication tolerances [3] for mode coupling based devices.
Passive device architectures rely on the availability of two polarizations to provide switching functionality. In order to reduce the device footprint and switching power, i.e. voltage and capacitance, the light-matter-interaction must be enhanced. To achieve this goal a variety of techniques are possible, ranging from high-field density waveguide modes, such as slots, and introducing optical cavities, to plasmonic approaches [4-15]. It has been previously shown that the strong electro-optical effects in metal-oxide-semiconductor (MOS)-like device designs on a silicon-on-insulator (SOI) low-optical-loss integration platform are realizable [16].